The outfit claims that it is the first machine of its kind, marking a shift from the front-end fab floor into the world of advanced packaging.
Modern packaging technologies like TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) and Intel’s Foveros are crucial for cramming more performance into AI chips and supercomputers without relying solely on smaller process nodes. Until now, fabs have had to rely on repurposed front-end tools that were either too fancy or not precise enough for packaging work.
ASML said in its third-quarter results, “In line with our plans to support our customers in the 3D integration space, we shipped ASML’s first product serving Advanced Packaging, the Twinscan XT:260, an i-line scanner offering up to 4x productivity compared to existing solutions.”
The Twinscan XT:260 is an i-line (365 nm) step-and-scan system for 300 mm wafers. It offers four times the productivity of older tools like Canon’s FPA-5520iV, while providing 400 nm resolution and a 35 nm overlay accuracy. It can expose one wafer while aligning the next, processing up to 270 wafers per hour at a 340 mJ dose.
Unlike older machines, the XT:260 uses a scanner design with continuous wafer movement, allowing it to handle warped wafers up to the 1.7 mm thick common in chiplet stacking. It supports large exposure fields up to 52 mm by 66 mm, big enough for 3,432 mm² interposers, avoiding the complexity of field stitching and boosting yield.
The machine’s dual-stage platform and through-silicon alignment accuracy make it particularly suited for advanced 3D methods like redistribution layers, through-silicon vias, and hybrid bonding. This is critical to the likes of TSMC’s CoWoS and SoIC packaging and Intel’s Foveros integration schemes.
Placed below ASML’s Twinscan XT:400M in the lineup, the XT:260 is designed as a cheaper, faster option for packaging rather than transistor patterning. Compared with long-serving PAS 5500 i-line steppers, which have been the workhorses of back-end fabs for decades, the XT:260 brings modern scanner architecture, advanced optics, and full automation.
This new generation of lithography systems reflects how the line between chip fabrication and packaging is blurring. Fabs run by Intel, Samsung, and TSMC now use front-end-grade gear from ASML, Canon, Lam Research, and Tokyo Electron inside their packaging facilities. These sites can cost more than €2.8 billion, roughly the price of a full fab a decade ago.
By improving speed, precision, and alignment for 3D integration, the XT:260 could accelerate adoption of complex multi-chip designs, but that precision will not come cheap. It signals that the industry is now treating packaging as the next great frontier in chipmaking, and ASML wants to own that space before its rivals catch up.
