In an article for Nature magazine, with the racy, punchy headline 'Ferroelectric transistor for low-power NAND flash memory,' the boffins said that the secret was to stop treating certain oxide semiconductors like lepers.

The work began by kicking long-held beliefs about oxide semiconductors into the long grass. These materials were considered useless for high performance because their threshold voltages were so high that they pushed transistor behaviour out of spec. The researchers decided that this supposedly grim trait was the ticket to improving power efficiency in tall NAND structures, where cell stacks grow to silly heights.

They argued that blocking currents below the threshold voltage would rein in leakage and boost efficiency. NAND flash strings cells in series, which always leads to leakage even when the switch is off, and the more floors you add, the worse the whole thing gulps power during reads and writes. The team showed they could throttle the leakage so sharply that power use fell by up to 96 per cent compared with existing NAND.

The limits that engineers had grumbled about for years looked like opportunities once the SAIT crowd pushed the materials and structure hard enough. If this ever reaches production, Samsung expects it to lift efficiency from the hulking AI data centres to titchy mobile and edge systems. Lower power draw means cheaper data centre bills and longer battery lives, which is handy for everyone.

Samsung Electronics SAIT researcher Yoo Si-jeong, the study’s first author, said “I am proud to confirm the possibility of implementing ultra-low-power NAND flash” and added that storage keeps growing in the AI ecosystem and they will chase further research to get the tech commercialised in the coming years, she said.